The invention relates generally to the manufacture of electronic devices. More specifically, this invention relates to multiple pattern forming methods for the formation of fine lithographic patterns.
In the semiconductor manufacturing industry, photoresist materials are used for transferring an image to one or more underlying layers, such as metal, semiconductor or dielectric layers, disposed on a semiconductor substrate, as well as to the substrate itself. To increase the integration density of semiconductor devices and allow for the formation of structures having dimensions in the nanometer range, photoresists and photolithography processing tools having high resolution capabilities have been and continue to be developed.
One approach to achieving nm-scale feature sizes in semiconductor devices is the use of short wavelengths of light, for example, 193 nm or less, during exposure of chemically amplified photoresists. Immersion lithography effectively increases the numerical aperture of the lens of the imaging device, for example, a scanner having a KrF or ArF light source. This is accomplished by use of a relatively high refractive index fluid (i.e., an immersion fluid) between the last surface of the imaging device and the upper surface of the semiconductor wafer. The immersion fluid allows a greater amount of light to be focused into the resist layer than would occur with an air or inert gas medium.
For the printing of line and space patterns, 193 nm immersion scanners are typically capable of resolving 36 nm half-pitch line and space patterns. The resolution for printing contact holes or arbitrary 2D patterns is further limited due to the low aerial image contrast with a dark field mask. The smallest half-pitch of contact holes for immersion lithography is generally limited to about 50 nm. The standard immersion lithography process is generally not suitable for manufacture of devices requiring greater resolution.
In an effort to achieve greater resolution and to extend capabilities of existing lithography tools, various double patterning techniques have been proposed. One such technique is self-aligned double patterning (SADP) (see, e.g., US 2009/0146322A1). In the conventional SADP process, a spacer layer is formed over pre-patterned lines, followed by etching to remove all spacer layer material on horizontal surfaces of the lines and spaces, leaving behind only material on the sidewalls of the lines. The original patterned lines are then etched away, leaving behind the sidewall spacers which are used as a mask for etching one or more underlying layers. Since there are two spacers for every line, the line density is effectively doubled. Conventional SADP processes require the use of complicated deposition and etching equipment and processing schemes, and can result in poor throughput and increased probability of wafer contamination. It would be desirable to employ a simpler double patterning approach which avoids or minimizes such problems.
Another double patterning technique is the double development method described, for example, in the document “Exploration of New Resist Chemistries and Process Methods for Enabling Dual-Tone Development,” C. Fonseca et al, 6th International Symposium on Immersion Lithography Extensions, Prague, Czech Republic (Oct. 22, 2009). This technique doubles the number of features formed from a photoresist layer by developing the photoresist layer twice, first by a positive tone developer (e.g., TMAH) to remove the high exposure dose areas and then by a negative tone developer (organic solvent) to remove the unexposed or lowest exposure dose areas. The negative tone developer is intended to remove the center portion of the resist pattern formed after the positive tone development while leaving the intermediate dose areas typically defining two opposing sidewalls of the resist pattern. Problems associated with the basic double development method include poor line width roughness (LWR) and unacceptable pattern shape. These problems are understood to be due to low acid contrast of the pattern sidewalls after the positive tone development.
The C. Fonseca et al document further describes a double development process which includes a step of flood exposure and baking after the positive tone development. This is believed to produce a high acid content in sidewalls of the resist pattern as a result of deprotection of acid-labile groups in the sidewall regions, rendering the sidewall portions insoluble in the negative tone developer. This method, however, can be disadvantageous in that acid-labile groups throughout the resist pattern including the previous low-dose regions can simultaneously become deprotected during the flood exposure and bake. This can render the low dose regions insoluble or partially insoluble in the negative tone developer, making it difficult for the developer to penetrate into and completely remove the center portion of the resist pattern, resulting in pattern defects.
There is a continuing need in the art for multiple-patterning processes useful in electronic device fabrication that address one or more of the foregoing problems associated with the state of the art.